Publications

• Communication dans un congrès

Wafer bonding process for III-V nanowires in BCB high index contrast waveguides

Michel Carette, D. Lauvernier, Jean-Pierre Vilcot, D. Bernard, Didier Decoster

WAPITI/PICMOS Workshop on III/V photonic components 3 dimensional integration, 2006, Halle, Germany. ⟨hal-00138907⟩

• Autre publication scientifique

Conception, réalisation et caractérisation des microcanaux pour les applications microfluidiques

M. Gaudet

2006. ⟨hal-00138941⟩

• Autre publication scientifique

Technologies microsystèmes avancées pour le fonctionnement de dispositifs en milieu liquide et les applications nanométriques

A.S. Rollier

2006. ⟨hal-00138943⟩

• Communication dans un congrès

Wideband analysis of coupled reverberation chambers for testing MIMO systems

O. Delangre, P. de Doncker, M. Lienard, Pierre Degauque

2006, 5 pp. ⟨hal-00140184⟩

• Communication dans un congrès

Intégration des réseaux de câbles dans la simulation CEM automobile en hautes fréquence

Guillaume Andrieu, L. Kone, F. Bocquet, B. Demoulin, J.P. Parmentier

2006, pp.278-280. ⟨hal-00142607⟩

• Article dans une revue

Transformation of hydrogen silsesquioxane properties with RIE plasma treatment for advanced multiple-gate MOSFETs

J. Penaud, F. Fruleux, Emmanuel Dubois

Keeping in line with Moore's law requires increasing efforts in the development of alternative electronic devices. Multiple-gate transistors are very promising in order to suppress short-channel effects and to increase the current drive. Nevertheless, the fabrication of such devices represents…

Applied Surface Science, 2006, 253 (1), pp.395-399. ⟨10.1016/j.apsusc.2006.06.021⟩. ⟨hal-00138654⟩

• Article dans une revue

Fabrication and room-temperature single-charging behavior of self-aligned single-dot memory devices

Xing Tang, N. Reckinger, V. Bayot, Christophe Krzeminski, Emmanuel Dubois, A. Villaret, D.C. Bensahel

Self-aligned single-dot memory devices and arrays were fabricated based on arsenic-assisted etching and oxidation effects. The resulting device has a floating gate of about 5-10 nm, presenting single-electron memory operation at room temperature. In order to realize the final single-electron memory…

IEEE Transactions on Nanotechnology, 2006, 5 (6), pp.649-656. ⟨10.1109/TNANO.2006.883481⟩. ⟨hal-00138655⟩

• Article dans une revue

An optimal high contrast e-beam lithography process for the patterning of dense fin networks

F. Fruleux, J. Penaud, Emmanuel Dubois, M. Francois, M. Muller

There are many difficulties to overcome towards the integration of 10 nm CMOS technology. One such major challenge is to keep a tight control of the leakage current of devices while increasing the current drive at a reduced supply voltage. In this context, multi-gated structures, which are used to…

Materials Science and Engineering: C, 2006, 26 (5-7), pp.893-897. ⟨10.1016/j.msec.2005.09.017⟩. ⟨hal-00138653⟩

• Communication dans un congrès

Growth of molecular nanostructures on Si using SAMs of long-chain alkytrichlorosilanes

L. Patrone, S. Desbief, D. Goguenheim, D. Vuillaume

Trends in NanoTechnologies, TNT2006, 2006, Grenoble, France. ⟨hal-00127136⟩

• Article dans une revue

Tunable BST capacitor loss compensation using active circuit

Mahmoud Al Ahmad, Nathalie Rolland, Paul-Alain Rolland

The compensation of the ohmic and the material dielectric losses in a barium strontium titanate (BST) capacitor using an active circuit is reported in this letter. The negative resistance (NR) circuit creates an effective conductance of -|G n | which adds to the positive conductance of the passive…

IEEE Microwave and Wireless Components Letters, 2006, 16, pp.549-551. ⟨hal-00154924⟩