Publications

Affichage de 7811 à 7820 sur 16279


  • Autre publication scientifique

Advances in Historical Studies [Editor in Chief 2/1]

Raffaele Pisano

2013. ⟨hal-04511056⟩

  • Article dans une revue

Radio-frequency and low noise characteristics of SOI technology on plastic for flexible electronics

A. Lecavelier Des Etangs-Levallois, Marie Lesecq, Francois Danneville, Y. Tagro, Sylvie Lepilliet, Virginie Hoel, David Troadec, D. Gloria, C. Raynaud, Emmanuel Dubois

In this work, we report on the HF performance and noise characteristics of 65 nm SOI-CMOS technology transferred onto plastic films. After transfer-bonding onto a thin flexible substrate, RF-SOI-MOSFETs are shown to feature high unity-current-gain cutoff and maximum oscillation frequencies f T /f…

Solid-State Electronics, 2013, 90, pp.73-78. ⟨10.1016/j.sse.2013.02.049⟩. ⟨hal-00914203⟩

  • Article dans une revue

MEMS piezoresistive ring resonator for AFM imaging with pico-Newton force resolution

Z. Xiong, B. Walter, E. Mairiaux, M. Faucher, L. Buchaillot, Bernard Legrand

Journal of Micromechanics and Microengineering, 2013, 23, pp.035016-1-10. ⟨10.1088/0960-1317/23/3/035016⟩. ⟨hal-00795965⟩

  • Article dans une revue

Delay time calculation for dual-wavelength quantum cascade lasers

A. Hamadou, S. Lamari, Jean-Luc Thobel

Journal of Applied Physics, 2013, 114, 203102, 7 p. ⟨10.1063/1.4829914⟩. ⟨hal-00912357⟩

  • Article dans une revue

Rate equations analysis of a dual-wavelength quantum cascade laser

A. Hamadou, Jean-Luc Thobel, S. Lamari

Optics Communications, 2013, 305, pp.147-154. ⟨10.1016/j.optcom.2013.05.004⟩. ⟨hal-00872061⟩

  • Communication dans un congrès

Self-aligned contacts for 10nm FDSOI node : from device to circuit evaluation

H. Niebojewski, C. Le Royer, Y. Morand, O. Rozeau, M.A. Jaud, S. Barnola, C. Arvet, J. Pradelles, J. Bustos, J.M. Pedini, Emmanuel Dubois, O. Faynot

We propose an original architecture adapted to the 10nm transistor node (pitch 64nm) for FDSOI technology. This structure features self-aligned contacts and a gate capping dielectric layer preventing any short in case of lithographic misalignment of contacts. 2D simulations are carried out to…

39th IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, IEEE S3S 2013, 2013, Monterey, CA, United States. paper 6a.4, 2 p., ⟨10.1109/S3S.2013.6716549⟩. ⟨hal-00955675⟩

  • Article dans une revue

Preface for the special issue of MTAP following CBMI 2011

José M. Martínez, Bernard Merialdo, Jenny Benois-Pineau, Joemon Jose

Multimedia Tools and Applications, 2013, 62 (1), pp.1 - 4. ⟨10.1007/s11042-011-0927-6⟩. ⟨hal-01437497⟩