Publications

Affichage de 2871 à 2880 sur 15871


  • Article dans une revue

Piezoresistance in defect-engineered silicon

Heng Li, Abel Thayil, Chris Lew, Marcel Filoche, Brett Johnson, Jeff Mccallum, S. Arscott, Alistair C. H. Rowe

The steady-state, space-charge-limited piezoresistance (PZR) of defect-engineered, silicon-on-insulator device layers containing silicon divacancy defects changes sign as a function of applied bias. Above a punch-through voltage (Vt) corresponding to the onset of a space-charge-limited hole current…

Physical Review Applied, 2021, 15 (1), 014046, 9 p. ⟨10.1103/PhysRevApplied.15.014046⟩. ⟨hal-03003310⟩

  • Communication dans un congrès

Polydimethylsiloxane micro-channels application for the study of dynamic wetting of nano-etched silicon surfaces based on acoustic characterization method

Abbas Salhab, Julien Carlier, Pierre Campistron, M. Neyens, Malika Toubal, Bertrand Nongaillard, V. Thomy

Efficient cleaning of contaminations in the semiconductor industry is a determining factor in ensuring the good quality of the electronics products. We present here the dynamic wetting characterization of a fluid on top of Deep Trench Isolation (DTI) structures using ultra-high frequency acoustic…

15th International Symposium on Ultra Clean Processing of Semiconductor Surfaces, UCPSS 2021, Session 6 - Wet processing in narrow spaces and pattern collapse, Apr 2021, Virtual, Unknown Region. pp.143-149, ⟨10.4028/www.scientific.net/SSP.314.143⟩. ⟨hal-03362264⟩

  • Article dans une revue

New barrier layer design for the fabrication of gallium nitride-metal-insulator-semiconductor-high electron mobility transistor normally-off transistor

Flavien Cozette, Bilal Hassan, Christophe Rodriguez, Eric Frayssinet, Rémi Comyn, François Lecourt, Nicolas Defrance, Nathalie Labat, François Boone, Ali Soltani, Abdelatif Jaouad, Yvon Cordier, Hassan Maher

This paper reports on the fabrication of an enhancement-mode AlGaN/GaN metal-insulator-semiconductor-high electron mobility transistor with a new barrier epi-layer design based on double Al 0.2 Ga 0.8 N barrier layers separated by a thin GaN layer. Normally-off transistors are achieved with good…

Semiconductor Science and Technology, 2021, 36 (3), pp.034002. ⟨10.1088/1361-6641/abd489⟩. ⟨hal-03341284⟩

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