Smail
NIAR

  • Bâtiment ISTV 2
    Bureau 90

Edge Artificial Intelligence, Hardware aware Neural Architecture Search

Multicore, Multi-Processor System-on-Chip (MPSoC)design

Heterogeneous computing

Power/energy consumption optimization

Intelligent Transportation Systems (ITS): Advanced Driver Assistant Systems (ADAS)

Fonctions actuelles

    Dans le groupe de recherche

  • LAMIH Computer Science :

    Member of the Mobile & Embedded System Groupe

  • Dans le laboratoire

  • Directeur du département Informatique :

    Directeur du département Informatique

  • Au sein de l'université

  • 2020 :

    Responsable de la mobilité internationale avec les USA

  • 2020 :

    no

  • Au niveau national

  • 2021 :

    Point de Contact National Horizon Europe, Domaine Numérique

Diplômes universitaires

  • 2005 :
    Habilitation (HDR): Some Contributions to the Development of New Processor Architectures: Back to Multiprocessors via Embedded Systems.
  • 1989 :
    Ph.D.in Computer Engineering, Thesis: Transputer-based Parallel Systems & Declarative Programming.
  • 1986 :
    Master in Computer Engineering, Thesis: Parallel Processor Architecture for PROLOG programming, University of Lille (France)

Expériences professionnelles

  • 2008-Present :

    Professor, INSA Hauts-de-France

  • 2013-2014 :
     Visiting Professor, Bogazici University, Computer Eng Departement, Istanbul Turkey
  • 1990-2008 :
    Associate Professor, University of Valenciennes, France.
  • 1986-1990 :
    Assistant Professor (ATER), University of Lille, Polytech'Lille Engineering School (EUDIL).

Valorisations academiques

    Contrat de recherche

  • French ANR-PREDIT (2008-2011) in Intelligent Transportation Program. Project : Prima-Care « Road accident avoidance system by associating intelligent multiple sensors, with dynamic management of sound alerts, function of incurred risk ».  (https://prima-care.inrets.fr/).

    French ANR-ARPEGE (2008-2012), Project « Power and Energy Optimization PLatform and Estimator Open_PEOPLE». In coopération with Collaboration : INRIA-Lille,  Thales, Thomson Multimédia (InPixal now), INRIA-Loria and universities of Nice, and Lorient. (http://www.open-people.fr/).

    European InterregIII, Project Modeasy (MOdel Driven dEsign for Automative Savety embedded sYstem), 2004-2007. In coopération with INRIA Lille (France) and University of Kent (UK).

  •   French National Research Foundation, “Enhanded Quality Using Intensive Test And Analysis on Simulators” EQUITAS, in cooperation with CEA (French Agency for Atomic Energy) and Continental Corp

  • Singapore-France scientific cooperation framework (Merlion). DREAMS: Dynamic REconfiguration for Application specific Multi-processor architectures.Ph-D student grant for 3 years in cooperation with Prof Tulika Mitra (National Univ of Singapore NUS), 2013-2015.
  • Responsabilités scientifiques de thèses

    • Ph.D (co)supervising : 
    1. Mariam Makni, Dessign Space Exploration and Optmization tools for Heteregenous, Multi-core & Reconfigurable Architectures, Co-supervising with M.Abid and M. Baklouti (ENIS), June 2015-Present.

    2. Boutheina MaaloulHigh-Performance and Embedded Architectures for Big-Data Applications in Intelligent Transportation Systems, Co-supervising with C.Valderama and Naim Harb (Univ Mons, Belgium), Oct 2014-Present.

    3. Guanwen Zhong, Application Specific Instruction Set Processors for FPGA based MSPoC in automotive applications. Co-supervising with Prof. Tulik Mitra (National University of Syngapour), from 06/2013-Present.

    4. Ihcene Alouani, Reliability and low energy consumption in FPGA-based embedded systems, from 01/2012-Present. Co-supervising with Pr. F.Kurdahi (Univ. of California, Irvine).

    5. Mohamed-Salah Souahi, Dynamic cache organization for MPSoC, Co-supervising with Prof. M.Zahran (New York Univ.).

    6. Montassir Bensaada, Application-specific instructions for reducing thermal dissipation in MPSoC architectures, from 01/2011-present. Co-supervising with Pr. M.Abid (ENIS Sfax).

    7. Bouthaina Damak, Dynamically reconfigurable application-specific instructions for multi-core fpga-based architectures, from 01/2011-present.

    8. Asmaa Benguedach, Rapid design space exploration methods for reconfigurable-shared caches in multi-core architectures, from 09/2010-04/2014. Co-supervising with Pr. B.Bouziane (Univ. of Oran, Algeria). Presently assistant professor, University of Oran, Algeria.

    9. Elias Baaklini, Programming and Mapping of Multimedia Applications on Heterogeneous FPGA-based Multicore Architectures, from 01/2010-03/2014, co-supervising with Pr. Hassan Sbeyti (Open Arab University, Bayreuth, Lebanon). Presently assistant professor, University of Valenciennes, France.

    10. Santosh Kumar Rethinagiri, High-level energy consumption modelization for heteregenous MPSoC architectures, 2009/2013, co-supervising with R.Ben-Atitallah. Presently Post-Doc at University of Barcelona, Spain.

    11. Hajer Chtioui, Dynamic Reconfigurable Coherency Protocol for Multi-Processor System-on-Chip.  2008-2011, Presently in Post-Doc at University of Sousse, Tunisia.

    12. Naim Harb, Dynamic reconfigurable architectures for driver assistant systems in the Prima-Care project, 2008-2011. Co-supervising with Pr. Mazen Saghir Texas A&M University. Presently Post-Doc at University of Mons, Belgium.

    13. Melhem Tawk, Fast performance and power evaluation for MPSoC design, 2005 – 2009, Presently Post-doc at University of Montreal, Canada.

    14. Jehangir Khan, Embedded System Design for Automotive Safety, Sept. 2006-2009. Presently at R&D division Valourec SA (France). ?

    15. Jamel Tayeb, Performance and energy optimization of VMs on Itanium's EPIC architecture, November 2004-2008. Presently with Intel Corp (Hillsboro, USA).

    16. Rabie Ben-Atitallah, Performance/power co-estimation in high level SoC design, INRIA-FUTURS co-supervised with J.L.Dekeyser, October 2004-2008. Presently Associate professor at Univ. of Valenciennes, France. 

    17. Nicolas Inglart, Fast complier optimization and architecture design space exploration for Intel Itanium and Xscale based embedded systems, September 2004. Passed away in 2008.

    18. Hassan Sbeyti, Embedded micro-architecture optimization for multimedia applications, September 2002-December 2005. Presently Associate Professor at Arab Open University, Beirut Lebanon.

    19. Nassima Kadri, Power aware code compression techniques for embedded platforms, co-supervised with Pr A.R.Baba-Ali (EE department, Univ of Algiers, Algeria), 2001-2004. Presently assistant Professor at Ecole National Supérieur de l’Informatique (ESI), Algiers, Algeria.

  • Appartenance à des sociétés savantes

  •  IEEE Senior Member
     ACM Member

Valorisations industrielles

    Brevets

  • International Patent, « Obstacle Detection Device Including a System of Sound Restitution for Road Accident Avoidance», (Ref. ALL/HC/I 08-4011 FR).
  • Contrats de recherche

  • Intel Corporation (2004-2006) Grant. Projet "FACSE: Framework for Architecture and Compiler Space Exploration"

  • Intel Corporation Grant: Energy Optimization by User/Application Interaction Analysis (2012-2015)

Organisation de conférences, expositions...

  • ·General Conference (Co-)Chair :  

         2016:

             - 8th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools Rapido 2016, program co-chair.

            - International Conference on super-computing 2016, Istanbul, Workshops and Tutorials chair, http://ics16.bilkent.edu.tr/index.htm

     

         2015:

    -Architectures and Systems for Automotive and Intelligent Transportation (ASAIT) Special Session, in conjuction with DSD2015, Madeira (Portgal), 2015, Program Chair.

    -20th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2015, Istanbul, TURKEY, March 14-18, 2015, Finance Chair.

    -7th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools Rapido 2015, program co-chair.

            2014, 

    -IEEE Design and Test Symposium IDT 2014, Publicity Co-Chairs, Algiers, Algeria, December 2014.

    -IEEE International Conference on Microelectronics (ICM 2014), Doha, Qatar, December 14-17, 2014, Panels Co-Chairs.

  • Membership of Technical Program Committees and Steering Committees:
  • 2016
  •           - Euromicro International Conference on Parallel, Distributed, and Network-Based Processing 2016
             - 12th International Symposium on Applied Reconfigurable Computing (ARC 2016)
             - 4th International Symposium on Modelling and Implementation of Complex Systems
  • 2015    
  • - IEEE/ACM Design Automation & Test in Europ (DATE'2015), D11 Reconfigurable Computing track (Grenoble 2015)
    - 6th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures PARMA'2015 (Amsterdam 2015)
    - International Symposium on Applied Reconfigurable Computing ARC'2015 (Porto 2015)
    - 23rd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing PDP'2015.
    - International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies (Heart 2015)

    o2014

    -Conference on Design & Architectures for Signal & Image Processing, DASIP 2014.

    -International Conference on VLSI Design 2014

    - IEEE International Conference on Computer Design (ICCD 2014), Electronic Design Automation Track. Seoul, Korea, 2014.

    -IEEE-ACM DATE’14, Design and Test in Europe, Dresden, Germany, from 24-28 March 2014 - Topic: D11 Reconfigurable Computing

    -International Symposium on Applied Reconfigurable Computing, ARC 2014, Algarve, Portugal, 14 - 16 April 2014.

    -Euromicro Digital System Design conference: Architectures, Methods and Tools, DSD’2014, Verona, Italy.

    -VLSI and Embedded Systems Conference, Jan 2014, Bombay India.

    -Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale, MEDIAN 2014

    -International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART), Sendai Miyagi, Japan.

    -7th  International Symposium on signal, Image, Video and Communications. 2014.

    o2013

    -IEEE-ACM Design Automation & Test in Europe DATE’13, Grenoble, France.

    -IEEE International Conference on Computer Design ICCD 2013. Asheville, NC, USA.

    -International Conference on Reconfigurable Computing and FPGAs, Reconfig 2013.

    -DASIP’13 Conference on Design & Architectures for Signal & Image Processing, Cagliari, Italy.

    -International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART), Edinburgh, UK.

    -IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) Istanbul, Turkey.

    - Rapid Simulation and Performance Evaluation: Methods and Tools “Rapido” workshop, Berlin, Germany.

    -Euromicro Digital System Design conference: Architectures, Methods and Tools, DSD’2013, Santander, Spain.

    -8th International Workshop on Applied Reconfigurable Computing ARC’2013.

    -Euromicro/IEEE Workshop on Embedded and Cyber-Physical Systems (ECYPS’2013).

    o2012

    -International Conference on ReConFigurable Computing and FPGAs, ReConFig’2012, Cancun, Mexico.

    -IEEE International Design and Test Symposium, IDT’2012, Doha, Qatar.

    -IEEE Workshop on Multicore and Multithreaded Architectures and Algorithms.

    -IEEE-ACM Design Automation & Test in Europe DATE 2012. Session co-chairman on “Architectures & Networks for Adaptive Systems” and member of the best interactive presentation award committee.

    -ACM-IEEE Design Automation Conference DAC, Expert Reviewer.

    -Euromicro Digital System Design DSD conference, DSD 2012.

    -IEEE International Conference on Computer Design (ICCD), 2012.

    -Workshop on Highly Efficient Accelerators and Reconfigurable Technologies (HEART)

    -IEEE International Conference on Micro-Electronics ICM 2012, Algiers, Algeria.

    o2011

    -ACM-IEEE Design Automation Conference DAC 2008-2012, Expert Reviewer.

    -Conference on Design and Architectures for Signal and Image Processing (DASIP)

    -Symposium on Application Specific Processors (SASP), +Session chairman.

    -Euromicro Digital System Design DSD conference (+Session chairman).

    -Workshop on Parallel Programming and Run-time Management Techniques for Many-Core Architectures.

    -Workshop on Highly Efficient Accelerators and Reconfigurable Technologies (HEART).

    -IEEE International Conference on Microelectronics ICM, Session chairman.

    -IEEE International Conference on Computer Design (ICCD).

    -Asia Pacific Signal and Information Processing Association (APSIPA) (Circuits and Systems/VLSI track).

    o2010

    -ACM-IEEE Design Automation Conference DAC, Expert Reviewer.

    -Conference on Design and Architectures for Signal and Image Processing (DASIP).

    -Symposium on Application Specific Processors (SASP), Session chairman.

    -International Conference on Embedded Software EMSOFT’10 (ESWEEK).

    -Workshop on Parallel Programming and Run-time Management Techniques for Many-Core Architectures.

    -IEEE International Conference on Microelectronics ICM, Session chairman.

    -Euromicro Digital System Design DSD conference  (+Session chairman).

    -Asia Pacific Signal and Information Processing Association (APSIPA) (Circuits and Systems/VLSI track).

    o2009

    -ACM-IEEE Design Automation Conference DAC.

    -Symposium on Application Specific Processors (SASP), in conjunction with ACM-IEEE DAC conference.

    -Euromicro Digital System Design DSD conference.

    -IEEE International Conference on Microelectronics ICM.

    o2008

    -ACM-IEEE Design Automation Conference DAC’08.

    -Euromicro Digital System Design DSD conference.

    -IEEE International Conference on Signals, Circuits & Systems SCS08.

    -IEEE International Conference on Microelectronics ICM.

    o2007

    -IEEE International Conference on Microelectronics ICM’07

    -IEEE/ACM International Conference on Computer-Aided Design ICCAD’07.

  •  Editorial Board :
    - Microprocessors and Microsystems: Embedded Hardware Design (MICPRO) Journal

Autres

Enseignements actuels

  • Embedded system design, Real time application and implementation, Digital Signal Processing, Reconfigurable systems, DSP.
    Introduction to algorithmic and programming in C
    Introduction to computer architecture and circuit design
    Programming and architecture of multi-core architectures. Programming with: OpenMp, MPI, CUDA, OpenCL
LES PROCESSEURS ITANIUMs, par Smail NIAR et Jamel TAYEB. Eyrolles.
Derniers-nés de la branche Recherche et Développement d'Intel Corporation et de HP, les processeurs Itanium bénéficient d'une architecture révolutionnaire, capable d'offrir à faible coût des performances de calcul inégalées. Baptisée EPIC (Explicit Parallel Instruction Computer), cette architecture est destinée à connaître de nombreux développements technologiques dans les années à venir et tend à prendre une place grandissante dans l'industrie.

Éditeur

 As real-time and integrated systems become increasingly sophisticated, issues related to development life cycles, non-recurring engineering costs, and poor synergy between development teams will arise.

The Handbook of Research on Embedded Systems Design provides insights from the computer science community on integrated systems research projects taking place in the European region. This premier references work takes a look at the diverse range of design principles covered by these projects, from specification at high abstraction levels using standards such as UML and related profiles to intermediate design phases. This work will be invaluable to designers of embedded software, academicians, students, practitioners, professionals, and researchers working in the computer science industry.

Chapter 14: Dynamically Reconfigurable Embedded Architectures for Safe Transportations Systems, 

Naim Harb (Polytechnic Faculty of Mons, Bld Dolez 31, Belgium), Smail Niar (LAMIH-University of Valenciennes Le Mont Houy, France), Mazen A. R. Saghir (Electrical and Computer Engineering Program, Texas A&M University at Qatar, Qatar)

Éditeur

Revue internationale avec comité de lecture

Benmeziane H., El maghraoui K., Ouarnoughi H., Niar S. (2024). Grassroots Operator Search for Model Edge Adaptation using Mathematical Search Space. Future Generation Computer Systems, 1, pp. 1–21, ISSN 0167-739X. [IF=7.5]

Cicek I., Tatar G., Bayar S., Niar S. (2024). Recent Advances in Machine Learning based Advanced Driver Assistance System Applications. Microprocessors and Microsystems, Embedded Hardware Design, pp. In Press. [IF=3.5]

Benmeziane H., Ouarnoughi H., El maghraoui K., Niar S. (2023). Multi-Objective Hardware-Aware Neural Architecture Search with Pareto Rank-preserving Surrogate Models. ACM Transactions on Architecture and Code Optimization (TACO), Vol 20 Issue 2, pp. 1–21, ISSN 1544-3566. [IF=2.11]

Odema M., Bouzidi H., Ouarnoughi H., Al faruque M., Niar S. (2023). MaGNAS: A Mapping-Aware Graph Neural Architecture Search Framework for Heterogeneous MPSoC Deployment. ACM Transactions on Embedded Computing Systems (TECS), 22, pp. 1-19. [IF=1.88]

Bouquillon F., Niar S., Lipari G. (2022). Reducing the Fault Vulnerability of Hard Real-Time Systems. Journal of Systems Architecture, ISSN 1383-7621. [IF=5.83]

Bouzidi H., Ouarnoughi H., Niar S., Ait el cadi A. (2022). Performance Modeling of Computer Vision-based CNN on Edge GPUs. ACM Transactions on Embedded Computing Systems, Vol 21, Issue 5, pp. 1-32, ISSN 1539-9087. [IF=2.58]

Ouarnoughi H., Grislin-Le strugeon E., Niar S. (2022). Simulating Multi-agent-based Computation Offloading for Autonomous Cars. Cluster Computing Journal, 25, pp. 2755–2766. [IF=1.9] [DOI=https://doi.org/10.1007/s10586-021-03440-y].

Hemmati M., Biglari abhari M., Niar S. (2022). Adaptive Real-Time Object Detection for Autonomous Driving Systems. Journal of Imaging, Special Issue on Image Processing Using FPGAs, pp. 1-21, ISSN 2313-433X. [IF=4]

Chabot A., Alouani I., Nouacer R., Niar S. (2021). A Memory Reliability Enhancement Technique for Multi Bit Upsets. Journal of Signal Processing Systems, 93(4), pp. 439-459, ISSN 1939-8018. [IF=1.013]

Lachachi Y., Ouslim M., Niar S., Taleb-Ahmed A. (2020). Toward Real-time Road Detection for Autonomous Vehicles. Journal of Electronic Imaging, Vol. 29(4), ISSN 1017-9909. [IF=0.78]

Neggaz M., Alouani I., Niar S., Kurdahi F. (2020). Are CNNs Reliable Enough for Critical Applications? An Exploratory Study. IEEE Design & Test, Special Issue: Robust Resource-Constrained for Machine Learning, vol. 37, no. 2, pp. 76-83. [IF=3.22]

Alouani I., Ahangari H., Ozturk O., Niar S. (2020). Power-efficient reliable register file for aggressive-environment applications. IET Computers & Digital Techniques, 14 (1), pp. 1-8. [IF=0.85]

Chaib draa I., Niar S., Grislin-Le strugeon E., Biglari-Abhari, M., Tayeb J. (2019). ENOrMOUS: ENergy Optimization for MObile plateform using User needS. Journal of Systems Architecture (JSA) Elsevier, Vol. 97, pp. 320-334, ISSN 1383-7621. [IF=1.59]

Bensaada M., Jedidi A., Niar S., Abid M. (2019). Application Source Code Modification for Processor Architecture Lifetime Improvement. International Journal of Embedded Systems, vol 11, No 2, pp. 125 - 138

Makni M., Niar S., Baklouti M., Abid M. (2018). HAPE: A High-level Area-Power Estimation Framework for FPGA-based Accelerators. Microprocessors and Microsystems: EMBEDDED HARDWARE DESIGN, Vol 63, pp. 11-27. [IF=1.09]

Yantir H., Eltawil A., Niar S., Kurdahi F. (2018). Power Optimization Techniques for Associative Processors. Journal of Systems Architecture (JSA) Elsevier, Vol. 90, pp. 44-53. [IF=1.1]

Alouani I., Ahangari H., Ozturk O., Niar S. (2018). A Novel Heterogeneous Approximate Multiplier for Low Power and High Performance. IEEE Embedded Systems Letters, Vol: 10 - Issue: 2, pp. 45-48, ISSN 1943-0671

Nouiri M., Bekrar A., Jemai A., Niar S., Al-Ammari A. (2018). An effective and distributed particle swarm optimization algorithm for flexible job-shop scheduling problem. Journal of Intelligent Manufacturing, Vol 3, pp. 603–615. [IF=1.731] [DOI=10.1007/s10845-015-1039-3].

Salem F., Elhillali Y., Niar S. (2018). Efficient modeling of IEEE 802.11p MAC output process for V2X interworking enhancement. IET Networks, Vol 7 Issue 4, pp. 210 - 219. [IF=1.6]

Nouiri M., Bekrar A., Jemai A., Trentesaux D., Ammari A., Niar S. (2017). Two Stage particle swarm optimization to solve the Flexible job shop predictive scheduling problem considering possible machine breakdowns. Computers & Industrial Engineering, 112, pp. 595-606. [IF=2.623] [DOI=10.1016/j.cie.2017.03.006].

Chaib draa I., Niar S., Tayeb J., Grislin-Le strugeon E., Desertot M. (2017). Sensing User Context and Habits for Run-Time Energy Optimization. EURASIP Journal on Embedded Systems, 11, pp. 1-20, ISSN 1687-3963

Alouani I., Wael M., Eltawil A., Kurdahi F., Niar S. (2017). AS8-SRAM: Asymmetric SRAM Architecture For Soft Error Hardening Enhancement. IET Circuits, Devices & Systems, 11, pp. 89–94. [IF=0.53]

Nouacer R., Djemal M., Niar S., Mouchard G. (2016). EQUITAS: A tool-chain for functional safety and reliability improvement in automotive systems. Microprocessors and Microsystems: EMBEDDED HARDWARE DESIGN, 47, pp. 252-261. [IF=0.57]

Zhong G., Niar S., Prakash A., Mitra T. (2016). Design of Multiple-Target Tracking System on Heterogeneous System-on-Chip Devices. IEEE Transactions on Vehicular Technology, 65, pp. 4802-4812. [IF=2.03]

Malazgirt A., Yurdakul A., Niar S. (2015). Customizing VLIW Processors from Dynamically Profiled Execution Traces. Microprocessors and Microsystems: Embedded Hardware Design ( ELSEVIER), Volume 39/Issue 8, pp. 656–673, ISSN 01419331. [IF=0.59]

Dammak B., Baklouti M., Benmansour R., Niar S., Abid M. (2015). Hardware Resource Utilization Optimization in FPGA-Based Heterogeneous MPSoC Architectures. Microprocessors and Microsystems: Embedded Hardware Design ( ELSEVIER), Volume 39, Issue 8, pp. Pages 1108-1118, ISSN 0141-9331. [IF=0.6]

Dammak B., Baklouti M., Benmansour R., Niar S., Abid M. (2015). Framework for a Selection of Custom Instructions for Ht-MPSoC in Area-Performance Aware Manner. IEEE Computer Architecture Letters, Volume: PP, Issue: 99, ISSN 1943-0663. [IF=0.67]

Fall B., Niar S., Sassi A., Rivenq-Menhaj A. (2015). Adaptation of LTE-Downlink Physical Layer to V2X and T2X communications. International Journal of Engineering and Innovative Technology (IJEIT), Vol 4 - Issue 10, pp. pp182-192. [IF=2.137]

Baaklini E., Rethinagiri S., Sbeyti H., Niar S. (2014). Scalable Row-Based Parallel H.264 Decoder on Embedded MultiCore Processors. "Signal, Image and Video Processing" Journal, Springer, 03/2014, pp. 1-10, ISSN 1863-1703. [IF=1.02]

Bengueddach A., Senouci B., Niar S. (2013). Two-level Caches Tuning Technique For Energy Consumption in Reconfigurable Embedded MPSoC. Journal of Systems Architecture (ELSEVIER), Volume 59, Issue 8,, pp. 656–666, ISSN 1383-7621. [IF=0.577] [DOI=http://www.sciencedirect.com/science/article/pii/S1383762113000994].

Eltawil A., Engel M., Geuskens B., Djahromi A., Kurdahi F., Marwedel P., Niar S., Saghir M. (2013). A Survey of Cross-Layer Power-Performance-Reliability in Multi and Many Core Systems-on-Chip. Embedded Hardware Design - Microprocessors and Microsystems, Volume 37, Issue 8, pp. 760-771, ISSN 0141-9331. [IF=0.6]

Chtioui H., Niar S., Ben atitallah R., Zahran M., Dekeyser J.-L., Abid M. (2012). A Dynamic Hybrid Cache Coherency Protocol for Shared-Memory MPSoC Architectures. International Journal of Computer Applications (IJCA), 11, pp. 1, ISSN 0975 - 8887.. [IF=0.832]

Liu H., Niar S., Elhillali Y., Rivenq-Menhaj A. (2011). Embedded Architecture with Hardware Accelerator for Target Recognition in Driver Assistance Systems. ACM SIGARCH Computer Architecture News (ACM CAN), ISSN 0-89791-534-8. [IF=1]

Bakhouya M., Suboh S., Gaber J., El-Ghazawi T., Niar S. (2011). Performance Evaluation and Design Tradeoffs of On-Chip Interconnect Architectures. Simulation Modelling Practice and Theory, 19, ISSN 1569-190X. [IF=0.799]

Ben atitallah R., Piel E., Niar S., Marquet P., Dekeyser J.-L. (2011). A Fast MPSoC Virtual Prototyping for Intensive Signal Processing Applications. Microprocessors and Microsystems Embedded Hardware Design Journal (MICPRO), 36 issue 3, pp. 176–189

Tawk M., Ibrahim K., Niar S. (2010). Parallel Application Sampling in MPSoC Simulation. Design Automation for Embedded Systems, International Journal, ISSN 0929-5585. [IF=0.909]

Khan J., Niar S., Saghir M., Elhillali Y., Rivenq-Menhaj A. (2010). Trade-off Exploration for Target Tracking Application in a Customized Multiprocessor Architecture. Journal on Embedded Systems, 175043, pp. 1-21, ISSN 1687-3963. [IF=0.7]

Ibrahim K., Niar S. (2009). Power-aware Bus Coscheduling for Periodic Realtime Applications Running on Multiprocessor SoC. Transactions on High-Performance Embedded Architecture and Compilation, 2, pp. 170-192, ISSN 978-3-642-00903-7

Harb N., Niar S., Khan J., Saghir M. (2009). A Reconfigurable Platform Architecture for an Automotive Multiple-Target Tracking System. ACM SIGBED Review, Vol6, Num3, ISSN 1551-3688

Sakkila L., Deloof P., Elhillali Y., Rivenq-Menhaj A., Niar S. (2007). A real time signal processing for an anticollision road radar system. IEEE INTELLIGENT TRANSPORTATION SYSTEMS, 1, pp. 18-23

Sbeyti H., Niar S., Eeckhout L. (2006). Pattern-Driven Prefetching for Multimedia Applications on Embedded Processors. Journal of Systems Architecture, Vol 52, issue 4, pp. p199-212,, ISSN 1383-7621

Eeckhout L., Niar S., De bosschere K. (2005). Optimal Sample Length for Efficient Cache Simulation. Journal of Systems and Architectures, Volume 51, Issue 9.

Niar S., Lecouffe M.-P., Gongalves G., Toursel B. (1990). The evaluation of the N-arch emulator on a transputer network. Microprocessing and Microprogramming Journal, Volume 28, Issues 1-5

Gongalves G., Niar S., Lecouffe M.-P., Toursel B. (1988). A network of transputers to emulate a parallel symbolic processor. Microprocessing and Microprogramming journal, Volume 23, Issues 1-5

Ouvrage

Tayeb J., Niar S. (2006). Les Processeurs Intel Itanium: Programmation et Optimisation, . Eyrolles, Paris, ISBN 2212115369

Coordination d'ouvrage

Niar S., Silvano C. (2013). Special Issue: "DSD 2012 Reliability and Dependability in new (MP)SoC Technologies", Microprocessors and Microsystems: Embedded Hardware Design, Volume 37 (8), . Elsevier, ISBN 0141-9331

Actes de congrès organisé par le LAMIH

Niar S., Ouarnoughi H. (2023). 26th Euromicro Conference Series on Digital System Design (DSD). , Durres, Albania, IEEE Conference Publishing Services (CPS)

Niar S. (2020). 2nd IEEE International Conference on Design & Test of integrated micro & nano-Systems. , Hammamet, Tunisia

Niar S., Alouani I. (2018). ASAASIT: Architectures and Systems for Automotive, Aeronautic, Space and Intelligent Transportation. , Prague, Czech Republic, IEEE Xplore

Niar S., Saghir M., Lipari G., Ozturk O. (2018). Proceedings of the 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC). , Lille France, IEEE Xplore

Niar S. (2012). 15th Euromicro Conference on Digital System Design, DSD'2012. , Izmir, Turkey, IEEE, ISBN 978-0-7695-4798-5

Sazeides Y., Niar S., Michael M. (2012). FP7 Hipeac European Network of Excellence, Thematic Session « The intertwining challenges of reliability, testing and verification »,Program co-chair.. , Ghent (Belgium)

Gracia pérez D., Niar S., Silvano C., Biglari abhari M. (2012). Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools. , Paris, ISBN ISBN: 978-1-4503-1114-4

Ben atitallah R., Niar S. (2011). 3rd Workshop on: Rapid Simulation and Performance Evaluation: Methods and Tools. , Heraklion, Greece, Hipeac

Chapitre d'ouvrage

Nouiri M., Bekrar A., Jemai A., Ammari A., Niar S. (2018). A New Rescheduling Heuristic for Flexible Job Shop Problem with Machine Disruption. In Borangiu, Trentesaux, Thomas, Cardin, Service Orientation in Holonic and Multi-Agent Manufacturing, 762, Studies in computational intelligence, Springer, pp. 461-476

Harb N., Niar S., Saghir M., Khan J. (2014). Dynamically Reconfigurable Embedded Architectures for Safe Transportations Systems. Industrial and Research Perspectives on Embedded System Design, IGI GLOBAL, pp.

Conférence internationale avec actes et comité de lecture

Mecharbat L., Benmeziane H., Niar S., Ouarnoughi H., El maghraoui K. (2024). DFUSENAS: A Diffusion-Based Neural Architecture Search. International Joint Conference on Neural Networks (IJCNN), 1, YOKOHAMA, JAPAN, pp. In Press, juin .

Ghebriout M., Bouzidi H., Niar S., Ouarnoughi H. (2023). Harmonic-NAS: Hardware-Aware Multimodal Neural Architecture Search on Resource-constrained Devices. The 15th Asian Conference on Machine Learning, Istanbul, Turkeye, novembre .

Bouaziz S., Benmeziane H., Imine Y., Hamdad L., Niar S., Ouarnoughi H. (2023). FLASH-RL: Federated Learning Addressing System and Static Heterogeneity using Reinforcement Learning. IEEE International Conference on Computer Design (ICCD'23), Washington DC, USA, novembre .

Benmeziane H., El maghraoui K., Ouarnoughi H., Niar S. (2023). Pareto Rank-Preserving Supernetwork for Hardware-aware Neural Architecture Search. 26th European Conference on Artificial Intelligence (ECAI'23), Kraków, Poland, octobre .

Odema M., Bouzidi H., Ouarnoughi H., Niar S., Al faruque M. (2023). MaGNAS: A Mapping-Aware Graph Neural Architectural Search Framework for Heterogeneous MPSoC Deployment. CASES'23: International Conference on Compilers, Architectures, and Synthesis for Embedded Systems, HAMBURG, GERMANY, septembre .

Benmeziane H., Lammie C., Boybat I., Rasch M., Le gallo M., Tsai H., Muralidhar R., Niar S., Ouarnoughi H., Narayanan V., Sebastian A., El maghraoui K. (2023). AnalogNAS: A Neural Network Design Framework for Accurate Inference with Analog In-Memory Computing (Best Paper Award). IEEE INTERNATIONAL CONFERENCE ON EDGE COMPUTING & COMMUNICATIONS, CHICAGO, ILLINOIS USA, juillet .

Bouzidi H., Odema M., Ouarnoughi H., Al faruque M., Niar S. (2023). Map-and-Conquer: Energy-Efficient Mapping of Dynamic Neural Nets onto Heterogeneous MPSoCs. Design Automation Conference (DAC'2013), San Fransisco USA, juillet .

Bouzidi H., Odema M., Ouarnoughi H., Al faruque M., Niar S. (2023). HADAS: Hardware-Aware Dynamic Neural Architecture Search for Edge Performance Scaling. Design, Automation and Test in Europe Conference (DATE'2023), Antwerp, Belgium, pp. 1-6, avril .

Mecharbat L., Benmeziane H., Ouarnoughi H., Niar S. (2022). HyT-NAS: Hybrid Transformers Neural Architecture Search for Edge Devices. Workshop on Compilers, Deployment, and Tooling for Edge AI (In parallel with Embedded Systems Week 2022), octobre .

Bouzidi H., Ouarnoughi H., Niar S., Talbi E.-G., Ait el cadi A. (2022). Co-Optimization of DNN and Hardware Configurations on Edge GPUs. 25th Euromicro Conference on Digital System Design (DSD), Gran Canaria, Spain, septembre .

Benmeziane H., Ouarnoughi H., Niar S., El maghraoui K. (2022). CaW-NAS: Compression Aware Neural Architecture Search. 25th Euromicro Conference on Digital System Design (DSD), Gran Canaria, Spain, septembre .

Bouzidi H., Ouarnoughi H., Talbi E.-G., Ait el cadi A., Niar S. (2022). Evolutionary-Based Co-Optimization of Deep Neural Networks and Hardware Configurations on Edge GPU. International Conference on Optimization and Learning, Springer, Italy, pp. 1-8, juillet .

Benmeziane H., Ouarnoughi H., El maghraoui K., Niar S. (2022). Pareto Rank Surrogate Model for Hardware-aware Neural Architecture Search. The International Symposium on Performance Analysis of Systems and Software (ISPASS 2022), 1, Singapore, pp. 1-6, mai .

Benmeziane H., Ouarnoughi H., Niar S., El maghraoui K. (2022). Real-time Style Transfer with Efficient Vision Transformers. 5th International Workshop on Edge Systems, Analytics and Networking (EdgeSys 2022), Rennes-France, avril .

Bouquillon F., Lipari G., Niar S. (2022). Improving CRPD Analysis for EDF Scheduling: Trading Speed for Precision. The 2022 ACM/SIGAPP Symposium on Applied Computing (SAC'22), Brno, Czech Republic, avril .

Bouquillon F., Lipari G., Niar S. (2022). Improving Instruction Cache Memory Reliability under Real-Time Constraints. 2nd European Automotive Reliability, Test and Safety workshop (eARTS), mars .

Bouzidi H., Ouarnoughi H., Talbi E.-G., Ait el cadi A., Niar S. (2021). Evolutionary-based Optimization of Hardware Configurations for DNN on Edge GPUs. META'21, The 8th International Conference on Metaheuristics and Nature Inspired Computing, Marrakech, Morocco, octobre .

Benmeziane H., Ouarnoughi H., El maghraoui K., Niar S. (2021). Accelerating Neural Architecture Search with Rank-Preserving Surrogate Models. 7th International Conference on Arab Women in Computing (ArabWIC 2021), Sharja, United Arab Emirates, août .

Benmeziane H., El maghraoui K., Ouarnoughi H., Niar S., Wistuba M., Wang N. (2021). Hardware-Aware Neural Architecture Search: Survey and Taxonomy. International Joint Conference on Artificial Intelligence (IJCAI 2021), Montreal, Canada, août .

Boussik A., Ben-Messaoud W., Niar S., Taleb-Ahmed A. (2021). Railway Obstacle Detection Using Unsupervised Learning: An Exploratory Study. 32nd IEEE Intelligent Vehicles Symposium (IV'21), NAGOYA, JAPAN, juillet .

Boussik A., Plissonneau A., Ben-Messaoud W., Taleb-Ahmed A., Niar S., Bekrar A., Trentesaux D. (2021). Vision-based railway track extraction and obstacle detection using deep learning for autonomous train. The 2nd International Workshop on Artificial Intelligence for RAILwayS (AI4RAILS), EURO 21, EURO, Athens, Greece, pp. 190, juillet ., ISBN 978-618-85079-1-3

Bouzidi H., Ouarnoughi H., Niar S., Ait el cadi A. (2021). Performance Prediction for Convolutional Neural Networks on Edge GPUs. ACM International Conference on Computing Frontiers 2021, Catania Italy, pp. 8, mai .

Bouhali N., Ouarnoughi H., Niar S., Ait el cadi A. (2021). Execution Time Modeling for CNN Inference on Embedded GPUs. Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO 2021), Budapest, Hungary, janvier .

Mahtani A., Ben-Messaoud W., Taleb-Ahmed A., Niar S., Strauss C. (2020). Pedestrian Detection and Classification for Autonomous Train. IEEE International Conference on Image Processing, Applications and Systems, Genova, Italy, décembre .

Grislin-Le strugeon E., Ouarnoughi H., Niar S. (2020). A Multi-Agent Approach for Vehicle-to-Fog Fair Computation Offloading. Proceedings of AICCSA 2020, the 17th ACS/IEEE International Conference on Computer Systems and Applications (November 2-5), IEEE, Antalya, Turkey, novembre .

Zahaf H., Lipari G., Niar S., Benyamina A. (2020). Preemption-Aware Allocation, Deadline Assignment for Conditional DAGs on Partitioned EDF. The 26th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA'2020), South Korea, août .

Ali K., Alouani I., Ait el cadi A., Ouarnoughi H., Niar S. (2020). Cross-Layer CNN Approximations for Hardware Implementation. Applied Reconfigurable Computing. Architectures, Tools, and Applications - 16th International Symposium, ARC 2020, Springer, Toledo, Spain, pp. 151-165, avril .

Haneche A., Lachachi Y., Ouarnoughi H., Niar S. (2020). A GPU enhanced LIDAR Perception System for Autonomous Vehicles. Parallel, Distributed, and Network-Based Processing, mars .

Ouarnoughi H., Neggaz M., Gulcan E., Ozturk O., Niar S. (2019). Hierarchical Collborative Platform for Autonomous Driving. Workshop on INTelligent Embedded Systems Architectures and Applications (ESWEEK'2019), NY USA, octobre .

Chabot A., Alouani I., Niar S., Nouacer R. (2019). A New Memory Reliability Technique For Multiple Bit Upsets Mitigation. ACM International Conference on Computing Frontiers, Sardinia, Italy, mai .

Chaib draa I., Niar S., Bouquillon F., Grislin-Le strugeon E. (2019). Machine Learning for Improving Mobile User Satisfaction. The 34th ACM/SIGAPP Symposium On Applied Computing (SAC'19), Limasol, Cyprus, avril .

Hemmati M., Biglari-Abhari, M., Niar S. (2019). Adaptive Vehicle Detection for Real-time Autonomous Driving System. Design Automation & Test Europe (DATE'2019), Florence, Italy, mars .

Neggaz M., Niar S. (2018). Computational and Communication Reduction Technique in Machine Learning Based Near Sensor Applications. IEEE International Conference on Microelectronics (ICM), Sousse, Tunisie, décembre .

Lachachi Y., Ouslim M., Taleb-Ahmed A., Niar S. (2018). LIDAR and Stereo-Camera fusion for reliable Road Extraction. IEEE International Conference on Microelectronics (ICM'2018), Sousse, Tunisie, décembre .

Neggaz M., Ribalta P., Alouani I., Niar S. (2018). A Reliability Study on CNNs for Critical Embedded Systems. The 36th IEEE International Conference on Computer Design ICCD, Orlando USA, pp. 1-4, octobre .

Chabot A., Alouani I., Nouacer R., Niar S. (2018). A Comprehensive Fault Injection Strategy for Embedded Systems Reliability Assessment. IEEE International Symposium on Rapid System Prototyping (RSP), octobre .

Salem F., Elhillali Y., Niar S. (2018). QoS-based Sequential Detection Algorithm for Jamming Attacks in VANET. Future Network Systems and Security FNSS 2018, Paris, France, juillet .

Niar S., Lachachi Y., Neggaz M., Alouani I., Yantir H., Kurdahi F., Eltawil A. (2018). Road Extraction and Object Recognition for Autonomous Cars. Workshop on New Platforms for Future Cars: Current and Emerging Trends (in conjunction with DATE'2018), Dresden Germany, mars .

Neggaz M., Yantir H., Niar S., Kurdahi F., Eltawil A. (2018). Rapid In-Memory Matrix Multiplication Using Associative Processor. IEEE-ACM Design Automation & Test In Europe (DATE'18), Dresden - Germany, mars .

Chabot A., Alouani I., Niar S., Nouacer R. (2018). A Fault Injection Platform for Early-Stage Reliability Assessment. Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools RAPIDO'18, Manchester UK, janvier .

Salem F., Elhillali Y., Niar S. (2017). Stochastic modeling of IEEE 802.11p output process for efficient V2X large-scale interworking. IEEE Symposium on Communications and Vehicular Technology (SCVT), pp. Pages 1-6, novembre .

Alouani I., Wild T., Herkersdorf A., Niar S. (2017). Adaptive Reliability for Fault Tolerant Multicore Systems. EuroMicro conference on Digital System Design DSD'2017, Vienna, Austria, septembre .

Salem F., Elhillali Y., Niar S. (2017). User Model-Based Method for IEEE 802.11p Performance Evaluation in Vehicular Safety Applications. 2017 IEEE International Conference on Vehicular Electronics and Safety, Vienna, Austria, juillet .

Ahangari H., Alouani I., Ozturk O., Niar S. (2017). Reconfigurable Hardened Latch and Flip-Flop for FPGAs. IEEE Computer Society Annual Symposium on VLSI (ISVLSI'2017), Bochum (Germany), juillet .

Chaib draa I., Grislin-Le strugeon E., Niar S. (2017). An Energy-Aware Learning Agent for Power Management in Mobile Devices. S. Benferhat, K. Tabia, M. Ali, Advances in Artificial Intelligence: From Theory to Practice - 30th International Conference on Industrial Engineering and Other Applications of Applied Intelligent Systems, IEA/AIE 2017, Arras, France, June 27-30, 2017, Proceedings, Part I, Lecture Notes in Computer Science 10350, Springer, pp. 242-245, juin ., ISBN 978-3-319-60041-3

Maaloul B., Taleb-Ahmed A., Niar S., Harb N., Valderrama C. (2017). Adaptive Video-Based Algorithm for Accident detection on Highways. 12th IEEE International Symposium on Industrial Embedded Systems, Toulouse France, juin .

Hemmati M., Biglari abhari M., Niar S., Berber S. (2017). Real-Time Multi-Scale Pedestrian Detection for Driver Assistance Systems. Design Automation Conference (IEEE-ACM DAC), Austin USA, pp. 49:1-49:6, juin .

Makni M., Baklouti M., Niar S., Abid M. (2017). Hardware Resource Estimation for Heterogeneous FPGA-Based SoC. ACM Symposium On Applied Computing 32nd, SAC'2017, Marrakech, Morocco, avril .

Zhong G., Prakash A., Wang S., Liang Y., Mitra T., Niar S. (2017). Design Space Exploration of FPGA-based Accelerators with Multi-level Parallelism. IEEE/ACM Design Automation and Test in Europe (DATE'17), mars .

Makni M., Niar S., Baklouti M., Zhong G., Mitra T., Abid M. (2017). A Rapid Data Communication Exploration Tool for Hybrid CPU-FPGA Architectures. Parallel, Distributed, and Network-Based Processing PDP 2017, St. Petersburg, Russia, mars .

Nouiri M., Jemai A., Chiheb A., Bekrar A., Trentesaux D., Niar S. (2016). Using IoT in breakdown tolerance : PSO solving FJSP. International Design and Test Symposium (IEEE), Hammamet, Tunisia, pp. 19-24, décembre . [DOI=10.1109/IDT.2016.7843008].

Alouani I., Ahangari H., Ozturk O., Niar S. (2016). NS-SRAM: Neighborhood Solidarity SRAM For Reliability Enhancement of SRAM Memories. Digital System Design, EuroMicro, Limassol Cyprus, septembre .

Chaib draa I., Nouiri M., Niar S., Bekrar A. (2016). Device Context Classification for Mobile Power Consumption Reduction. DIGITAL SYSTEM DESIGN, EuroMicro, Limassol Cyprus, septembre .

Zhong G., Prakash A., Liang Y., Mitra T., Niar S. (2016). Lin-Analyzer: A High-level Performance Analysis Tool for FPGA-based Accelerators. Design Automation Conference DAC'2016, Austin, Texas, juin .

Alouani I., Ahangari H., Ozturk O., Niar S., Rivenq-Menhaj A. (2016). Register File Reliability Enhancement Through Adjacent Narrow-width Exploitation. 11th International Conference on Design &Technology of Integrated Systems in Nanoscale Era, Istanbul, Turkey, avril .

Mustafa N., Ozturk O., Niar S. (2016). Adaptive Routing Framework for Network on Chip Architectures. 8th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, Prague, Czech Republic, janvier .

Mediouni B., Niar S., Benmansour R., Benatchba K., Koudil M. (2015). A Bi-Objective Heuristic for Heterogeneous MPSoC Design Space Exploration. IEEE International conference on Design & Test (IDT'2015), Amman, Jordan, pp. 1-6, décembre .

Maaloul B., Taleb-Ahmed A., Valderrama C., Niar S., Derraz F., Harb N. (2015). A Survey on Vision-based Traffic Accident Detection Techniques. International Conference on Advanced Communication Systems and Signal Processing (ICOSIP 2015), Tlemcen, Algeria, novembre .

Alouani I., Mediouni B., Niar S. (2015). A Multi-Objective Approach for Software/Hardware Partitioning in Reconfigurable Embedded Systems. Rapid System Prototyping, Amsterdam, N, octobre .

Nouiri M., Bekrar A., Jemai A., Trentesaux D., Ammari A., Niar S. (2015). An improved multi-agent particle swarm optimization to solve flexible job-shop scheduling problem. 45th International Conference on Computers & Industrial Engineering (CIE45), Metz, France, pp. 297-304, octobre ., ISBN 978-1-5108-1745-6

Chaib draa I., Tayeb J., Niar S., Grislin-Le strugeon E. (2015). Application Sequence Prediction for Energy Consumption Reduction in Mobile Systems. The 15th IEEE International Conference on Computer and Information Technology (CIT-2015), UK, octobre .

Chaib draa I., Tayeb J., Niar S., Desertot M. (2015). User information Analysis for Energy Consumption Optimization in Mobile Systems. High Performance Energy Efficient Embedded Systems (HIP3ES 2015), Amsterdam, Netherlands, septembre .

Nouacer R., Djemal M., Niar S., Mouchard G. (2015). Enhanced Quality Using Intensive Test and Analysis on Simulators. Digital System Design 2015, Madeire, Portugal, août .

Niar S., Yurdakul A., Unsal O., Tugcu T., Yuceturk A. (2014). A Dynamically Reconfigurable Architecture for Emergency and Disaster Management in ITS. 2014 International Conference on Connected Vehicles & Expo, Vienna-Austria, novembre .

Zhong G., Venkataramani V., Liang Y., Mitra T., Niar S. (2014). Design Space Exploration of Multiple Loops on FPGAs using High Level Synthesis. The 32nd IEEE International Conference on Computer Design, ICCD 2014, octobre .

Dammak B., Benmansour R., Baklouti M., Niar S., Abid M. (2014). Analytical Model for FPGA-based MPSoC Design Space Exploration. 24th International Conference on Field Programmable Logic and Applications (FPL'2014), Munich, Allemagne, septembre .

Malazgirt A., Yantir H., Yurdakul A., Niar S. (2014). Application Specific Multi-port Memory Customization in FPGAs. 24th International Conference on Field Programmable Logic and Applications (FPL'2014), septembre .

Hemmati M., Biglari abhari M., Berber S., Niar S. (2014). HOG Feature Extractor Hardware Accelerator for Real-time Pedestrian Detection. Digital System Design (DSD'2014), Verona Italy, août .

Sen A., Kara G., Deniz E., Niar S. (2014). Fast System Level Benchmarks for Multicore Architectures. Digital System Design (DSD'2014), Verona Italy, août .

Dammak B., Benmansour R., Baklouti M., Niar S., Abid M. (2014). Design Space Exploration for Customized Asymmetric Heterogeneous MPSoC. Digital System Design (DSD'2014), Verona Italy, août .

Malazgirt A., Yurdakul A., Niar S. (2014). MIPT: Rapid Exploration and Evaluation for Migrating Sequential Algorithms to Multiprocessing Systems with Multi-Port Memories. The International Conference on High Performance Computing & Simulation (HPCS 2014), Bologna, Italy, juillet .

Alouani I., Saghir M., Niar S. (2014). ARABICA: A Reconfigurable Arithmetic Block for ISA Customization. the 10th International Symposium on Applied Reconfigurable Computing, ARC'2014, Vilamoura, Algarve, Portugal, avril .

Alouani I., Niar S., Saghir M., Kurdahi F. (2014). BADR: Boosting Reliability Through Dynamic Redundancy. 3rd Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale MEDIAN'2014, Dresden, mars .

Carlier O., Tayeb J., Desertot M., Lecomte S., Niar S. (2013). Run-Time Users/Applications Interaction Analysis for Power Consumption Optimization. 4th International Conference on Energy Aware Computing Systems & Applications, Istambul, Turkey, décembre .

Siblini A., Baaklini E., Sbeyti H., Niar S. (2013). Efficient FPGA implementation of H.264 CAVLC entropy decoder. IEEE International Design and Test Symposium (IDT'13), décembre .

Dammak B., Baklouti M., Niar S., Hanafi S., Abid M. (2013). Integer Linear Programming for Design Space Exploration in Heterogeneous MPSoC. 21st IFIP/IEEE International Conference on Very Large ScaleIntegration(VLSI-SoC), Turquie, octobre ., ISBN 978-1-4799-0522-5

Nouiri M., Jemai A., Chiheb A., Bekrar A., Niar S. (2013). An effective particle swarm optimization algorithm for flexible job-shop scheduling problem. IEEE International Conference on Industrial Engineering and Systems Management IESM'13, I4E2, Rabat, Morocco, pp. 29-34, octobre ., ISBN 978-2-9600532-4-1

Dammak B., Baklouti M., Niar S., Abid M. (2013). Shared Hardware Accelerator Architectures for Heterogeneous MPSoCs. 8th International Workshop on Reconfigurable Communication-centric Systems-on-Chip RecoSoc, Darmstadt - Germany, juillet .

Liu H., Niar S. (2013). Radar Signature in Multiple Target Tracking System for Driver Assistant Application. Design, Automation, and Test in Europe (DATE'2013), Grenoble, mars .

Bengueddach A., Senouci B., Niar S., Beldjilali B. (2012). Energy Consumption in Reconfigurable MPSoC Architecture: Two-Level Caches Optimization Oriented Approach. IEEE International Symposium on Design and Test (IDT'2012), Doha, Qatar, décembre .

Bensaada M., Jedidi A., Niar S., Abid M. (2012). Compilation Optimization Exploration for Thermal, Dissipation Reduction in Embedded Systems. IEEE International Symposium on Design and Test (IDT'2012), Doha, Qatar., décembre .

Alouani I., Niar S., Kurdahi F., Abid M. (2012). Parity-Based Mono-Copy Cache for Low Power Consumption and High Reliability. IEEE International Symposium on Rapid System Prototyping, Tampere-Finland, pp. 1-6, octobre .

Baaklini E., Sbeyti H., Niar S. (2012). H.264 Macroblock Line Level Parallel Video Decoding on Embedded Multicore Processors. Smail Niar, Digital System Design, Izmir, Turkey, septembre .

Bakhouya M., Chariete A., Gaber J., Wack M., Niar S., Coatanea E. (2012). Performance Evaluation of a Flow Control Algorithm for Network-on-Chip. The 2012 International Conference on High Performance Computing & Simulation (HPCS 2012), Madrid, Spain, juillet .

Rethinagiri S., Ben atitallah R., Senn E., Dekeyser J.-L., Niar S. (2012). An Efficient Power Estimation Methodology for Complex RISC Processor based Embedded Platforms. 22nd Great Lakes Symposium on VLSI (GLSVLSI 2012), Salt Lake City, Utah, USA, mai .

Tawk M., Ibrahim K., Niar S. (2012). Concurrent Phase Classification for Accelerating MPSoC Simulation. 3rd Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures (PARMA'2012), février ., ISBN 978-3-88579-294-9

Harb N., Saghir M., Niar S. (2012). A Dynamically Reconfigurable Kalman Filtering Block for an Automotive Multiple Target Tracking System. 6th HiPEAC Workshop on Reconfigurable Computing, Paris, janvier .

Bengueddach A., Niar S., Beldjilali B. (2011). Online First Fit Algorithm for Modeling the Problem of Configurable Cache Architecture. IEEE International Conference on Microelectronics (ICM'2011), décembre .

Souahi M., Niar S., Zahran M. (2011). Towards Dynamic Cache Block Placement for Multi-processor NUCA. IEEE International Conference on Microelectronics (ICM'2011), décembre .

Rethinagiri S., Ben atitallah R., Senn E., Niar S., Dekeyser J.-L. (2011). Fast and Accurate Hybrid Power Estimation Methodology for Embedded Systems. Conference on Design & Architectures for Signal & Image Processing, Tampere FL, novembre .

Rethinagiri S., Ben atitallah R., Niar S., Senn E., Dekeyser J.-L. (2011). Hybrid System Level Power Consumption Estimation for FPGA-Based MPSoC. International Conference on Computer Design (ICCD'11), septembre .

Harb N., Niar S., Saghir M., Elhillali Y., Ben atitallah R. (2011). Dynamically Reconfigurable Architecture for a Driver Assistant System. IEEE Symposium on Application Specific Processors (SASP 2011), San Diego, California, USA, juin .

Liu H., Niar S., Elhillali Y., Rivenq-Menhaj A. (2011). Heterogeneous Embedded Architecture for Target Recognition in a Driver Assistant System. 2nd International Workshop on Highly Efficient Accelerators and Reconfigurable Technologies (HEART) 2011, London, juin .

Baaklini E., Sbeyti H., Niar S. (2010). H.264 Color Components Video Decoding Parallelization on Multi-Core Processors. 13th EUROMICRO Conference on Digital System Design DSD'2010, Lille-France, septembre .

Lange T., Harb N., Niar S., Liu H., Ben atitallah R. (2010). An Improved Automotive Multiple Target Tracking System Design. 13th EUROMICRO Conference on Digital System Design DSD'2010, Lille France, septembre .

Trabelsi C., Meftali S., Dekeyser J.-L., Niar S. (2010). An MDE Approach for Energy Consumption Estimation in MPSoC Design. 2nd Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO‘2010), Pise, Italie, février .

Harb N., Niar S., Saghir M., Khan J. (2009). A Reconfigurable Platform Architecture for an Automotive Multiple-Target Tracking System. 2nd Workshop on Adaptive and Reconfigurable Embedded Systems (APRES'2009), in conjunction with Esweek (CASES'09, CODES+ISSS'09, EMSOFT'09), Grenoble, France, octobre .

Khan J., Niar S., Rivenq-Menhaj A., Elhillali Y. (2009). Radar Based Collision Avoidance System Implementation in a Reconfigurable MPSoC.. 9th International Conference on Inteligent Transportation System & Telecommunications, Lille, septembre .

Chtioui H., Ben atitallah R., Niar S., Dekeyser J.-L., Abid M. (2009). A Dynamic Hybrid Cache Coherency Protocol for Shared-Memory MPSoC. 12th EUROMICRO Conference on Digital System Design, University of Patras, Greece, août .

Khan J., Niar S., Saghir M., Elhillali Y., Rivenq-Menhaj A. (2009). Driver Assistance System Design and its Optimization for FPGA Based MPSoC. IEEE Symposium on Application Specific Processors, SASP 2009 (in conjuction with DAC'09), juillet .

Khan J., Niar S., Rivenq-Menhaj A., Elhillali Y. (2008). Multiple Target Tracking System Design for Driver Assistance Application. Jehangir Khan, Smail Niar, Atika Rivenq-Menhaj, Yassin el Hillali, Design & Architectures for Signal and Image processing, Brussells, Belgium, pp. 8, novembre .

Tawk M., Ibrahim K., Niar S. (2008). Multi-granularity Sampling for Simulating Concurrent Heterogeneous Applications. International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), Georgia, USA, octobre .

Baghdadi R., Niar S. (2008). Enhancing Image Processing Capability by Memory Compression. International Conference on Signals, Circuits and Systems, octobre .

Khan J., Niar S., Rivenq-Menhaj A., Elhillali Y. (2008). FPGA Implementation of an MPSoC for Driver Assistance System Based on Multiple Target Tracking with Radar. Khan Jehangir, Niar Smail, Rivenq-Menhaj, Elhillali Yassin, 34th Euromicro SEAA Conference 2008, Parma, Italie, septembre .

Khan J., Niar S., Elhillali Y., Rivenq-Menhaj A., Dekeyser J.-L. (2008). An MPSoC Architecture for the Multiple Target Tracking Application in Driver Assistant System. 19th IEEE International Conference Application-specific Systems, Architectures and Processors (ASAP), Leuven, Blegium, juillet .

Chtioui H., Niar S., Abid M. (2008). Performances evaluation of multi-module cache memories for embedded systems. International Conference on Embedded Systems & Critical Applications, avril .

Tayeb J., Niar S., Benameur N. (2008). An MSIL Hardware Evaluation Stack for EPIC. 12th workshop on Interaction between Compilers and Computer Architectures (Interact-12), in conjunction with HPCA, Salt-Lake City USA, janvier .

Inglart N., Niar S., Cohen A. (2008). Hybrid Performance Analysis to Accelerate Compiler Optimization Space Exploration for In-Order Processors. 2nd Workshop on Statistical and Machine learning approaches to ARchitectures and compilaTion (SMART'08), Göteborg, Suede, janvier .

Ben atitallah R., Niar S., Dekeyser J.-L. (2007). MPSOC Power Estimation Framework at Transaction Level Modeling. The 19th IEEE International Conference on Microelectronics, Caire, Egypt, décembre .

Tawk M., Ibrahim K., Niar S. (2007). Adaptive Sampling for Efficient MPSoC Architecture Simulation. IEEE International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS), Istanbul, Turkey, octobre .

Niar S., Inglart N., Chaker M., Hanafi S., Benameur N. (2007). FACSE: a Framework for Architecture and Compilation Space Exploration. IEEE International Conference on Design & Technology of Integrated Systems in nanoscale era (DTIS'07), Rabat, Marocco, septembre .

Ben atitallah R., Niar S., Dekeyser J.-L. (2007). An MPSoC Performance Estimation Framework Using Transaction Level Modeling. IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, Seoul, Corea, août .

Ammous K., Benameur N., Niar S. (2007). Java Virtual Machines Behaviour on Embedded Systems. International Conference on Software Engineering (SE 2007), Innsbruck, Austria,, février .

Ben atitallah R., Piel E., Niar S., Marquet P., Dekeyser J.-L. (2007). Multilevel MPSoC simulation using an MDE approach. IEEE System-On-Chip Conference SOCC, Taiwan, janvier .

Ben atitallah R., Bonde L., Niar S., Meftali S., Dekeyser J.-L. (2006). Multilevel MPSoC Performance Evaluation Using MDE Approach. International Symposium on System-on-Chip, Tampere, Finland, novembre .

Tayeb J., Niar S. (2006). Optimizing Intel EPIC/Itanium2 Architecture for Forth. 22nd EuroForth Conference, Cambridge, UK, octobre .

Khan J., Elhillali Y., Niar S., Rivenq-Menhaj A. (2006). A low Speed Digital Correlator Architecture Optimized For Resource Savings. Reconfigurable Communication-centric SoCs RECOSoC, MONTPELLIER (Fr), juillet .

Sakkila L., Deloof P., Elhillali Y., Rivenq-Menhaj A., Niar S. (2006). A Real Time Signal Processing for an Anticollision Road Raadar System. IEEE Vehicular Technology Conference,, Fall 2006, Montréal, Canada, juillet .

Niar S., Inglart N. (2006). Rapid Performance and Power Consumption Estimation Methods for Embedded System Design. 17th IEEE International Workshop on Rapid System Prototyping, IEEE, Chania, Crete, juin .

Niar S., Meftali S., Dekeyser J.-L. (2006). Energy Consumption Estimation for MPSoC Architecture Exploration. Werner Grass, Bernhard Sick, Klaus Waldschmidt, ARCS'06, Architecture of Computing Systems, co-author: R.Benatitallah, A.Greiner, 3894 / 2006, Springer, LNCS, Frankfurt/Main (Germany), pp. 298 - 310, mai ., ISBN 3-540-32765-7

Tayeb J., Niar S. (2006). Adapting EPIC Architecture's Register Stack for Virtual Stack Machines. 9th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN, Architectures, Methods and Tools, Dubrovnik, Croatia, pp. 204-210, mai .

Ben atitallah R., Niar S., Greiner A., Meftali S., Dekeyser J.-L. (2006). Estimating energy consumption for an MPSoC architectural exploration. Architecture of Computing Systems (ARCS'06), Frankfurt, Germany, mars .

Niar S., Meftali S., Dekeyser J.-L. (2004). Power Consumption Aware in Cache Memory Design with SystemC. International Conference in MicroElectronics ICM, Tunis, Tunisia, décembre .

Meftali S., Dekeyser J.-L., Niar S. (2004). Performances Estimation Metamodel for MDA Based SoC Design. Intellectual Property System on Chip (IPSoC) and IP reuse Forum, Grenoble France,, novembre .

Ammous K., Benameur N., Niar S., Abed M. (2004). Improving the Adequacy of Java Application to Embedded Architectures through Bytecode Optimisation. Sciences of Electronic, Technologies of Information and Telecommunications (SETIT) IEEE, Sousse, Tunisie, mars .

Sbeyti H., Niar S., Eeckhout L. (2004). Adaptive Prefetching for Multimedia Applications in Embedded Systems. Design Automation and Test in Europe “DATE'04 conference”, IEEE ACM, Paris, France, pp. 1350-1351, février .

Turbatu E., Meftali S., Niar S., Dekeyser J.-L. (2004). An automatic communication synthesis for high level SOC design using transaction level modelling. Forum on Description Languages, FDL'04, Lille, France, pp. 403-405, janvier .

Kadri N., Niar S., Baba-Ali A. (2003). Impact of Code Compression on the Power Consumption. H.R. Arabnia, L. Tianruo Yang, Proceedings of the International Conference on Embedded Systems and Applications (ESA '03, June 23 - 26, 2003, Las Vegas, Nevada, USA), CSREA Press, janvier ., ISBN 1-932415-05-X

Niar S., Eeckhout L., De bosschere K. (2003). Comparing Multiported Cache Schemes. H.R. Arabnia, Y. Mun, Proceedings of the International Conference on Parallel and Distributed (PDPTA '03, June 23 -26, 2003, Las Vegas, Nevada, USA), 1, CSREA Press, janvier ., ISBN 1-892512-41-6

Niar S., Adda M. (2001). Performances of a Dynamic Threads Scheduler. Lecture Notes on Computer sciences LNCS 2150 Proceedings of the EuroPar Conf 2001, Spinger Verlag, Manchester, pp. 452-457, janvier .

Calland P.-Y., Andonov R., Yanev N., Rajopadhye S., Niar S. (2000). First Steps Towards Optimal Oblique Tile Sizing. CPC2000, Aussois, France, décembre .

Niar S., Adda M. (2000). Thread Synchronization and Scheduling in a Pipelined Multithreaded Processor,. 1st International Symposium on Advanced Distributed Systems, Guadalajara Jalisco, México, mars ., ISBN 970-692-045-5

Niar S. (2000). Thread Synchronization and Scheduling in a Pipelined Multithreaded. Processor. 1st International Symposium on Advanced Distributed Systems ISADS, Guadalajara Jalisco, Mexique, mars .

Bennani N., Cordonnier V., Donsez D., Lecomte S., Niar S. (1999). Digital photography and computer technology : a promising field of innovation. Actes de the 1st MDIC (Multimedia Databases and Image Communication), Salermo, Italie, octobre .

Bennani N., Donsez D., Niar S. (1999). Digital photography and computer technology : a promising field of innovation. Multimedia Databases and Image Communication, Solerno, Italie, octobre .

Adda M., Niar S. (1999). A Simulator for a multithreaded processor,. International conf. On Applied Informatics AI, Innsbruck, Austria, pp. 194-197, février ., ISBN 0-88986-241-9

Niar S., Fréville A. (1997). A parallel tabu search algorithm for the 0-1 multidimensionnal knapsack. International Parallel Processing Symposium IPPS. IEEE-ACM, Genève, Suisse, octobre .

Conférence nationale avec actes et comité de lecture

Mediouni B., Niar S., Benmansour R., Benatchba K., Koudil M. (2015). Approche Bi-objectif pour l'Exploration de l'Espace de Conception dans les MPSoC Hétérogènes. Conférence d'informatique en Parallélisme, Architecture et Système, Lille, juin .

Alouani I., Niar S., Djemai M., Kurdahi F., Abid M. (2012). Working Conditions-Aware Fault Injection Technique. Manifestation des Jeunes Chercheurs en Sciences et Technologies de l'Information et de la Communication, Lille, octobre .

Chtioui H., Ben atitallah R., Niar S., Abid M., Dekeyser J.-L. (2008). Gestion de la cohérence des caches dans les architectures MPSoC utilisant des NoC complexes. Rencontres francophones du Parallélisme (RenPar'18) / Symposium en Architecture de machines (SympA'2008) / Conférence Française sur les Systèmes d'Exploitation (CFSE'6), Fribourg, Switzerland, février .

Tawk M., Ibrahim K., Niar S. (2007). Dynamic Sample Generation for Rapid MPSOC Simulation. Colloque du GDR SOC SIP, Paris, juin .

Khan J., Elhillali Y., Niar S., Rivenq-Menhaj A. (2007). A Multiple Target Tracking SoC for Transport Security. Colloque du GDR SOC SIP, Paris, juin .

Inglart N., Eeckhout L., Niar S., Debosschere K. (2005). Méthodes Rapides pour l'Exploration de l'Espace des Configurations pour Systèmes Embarqués. SYMPosium en Architectures nouvelles de machines SympAAA'2005, Le Croisic, avril .

Kadri N., Niar S., Baba-Ali A., Benameur N. (2002). Performances of a Low Power Code Compression Processor. International Algerian Conference on Microelectronic ACM'02, Algiers, Algeria, janvier .

Sidi boulenouar B., Andonov R., Niar S. (2000). Méthodes exactes et méta-heuristiques parallèles pour la résolution du problème du sac à dos. Sixième Conférence Maghrébine en Informatique, FES, Maroc, novembre .

Séminaire et autres communications

Benmeziane H., El maghraoui K., Ouarnoughi H., Niar S., Wistuba M., Wang N. (2021). A Comprehensive Survey on Hardware-Aware Neural Architecture Search. , arXiv.org, janvier .

Neggaz M., Alouani I., Niar S., Kurdahi F. (2020). A New Storage-Less Hardware Compression Technique for Convolution Neural Networks Using Constant Multiplication. WAICA: Workshop on Artificial Intelligence and Computer Architecture in Conjunction with HiPeac conference'20, Bolgna-Italy, janvier .

Niar S. (2018). Un jour votre voiture n'aura plus besoin de vous. La Voix du Nord, Valenciennes, avril .

Alouani I., Niar S., Djemai M. (2012). Simulation Based Fault Injection Environment for Reliable Processor Architecture Exploration. GDR System-On-Chip, System-In-Package SOC-­SIP'12 Paris, June 2012., Paris, juin .

Rethinagiri S., Ben atitallah R., Niar S., Senn E., Dekeyser J.-L. (2011). An Effective Approach for Power Consumption Modeling of Complex Processor. GdR SOC-SIP, Lyon, France, juin .

Liu H., Niar S., Ben atitallah R. (2010). An efficient scalable MPSoC architecture for dynamic task distribution. PROGram for Research on Embedded Systems & Software, STW.ICT, Veldhoven, Nederland, novembre .

Khan J., Niar S., Elhillali Y., Rivenq-Menhaj A. (2008). système d'aide à la conduite par l'utilisation du suivi d'obstacles multiples sur architecture multi-processeurs reconfigurable. Séminaire Systèmes Embarqués : Sécurité, Confort, Aide à la conduite, ESIEE Amiens, mai .

Tawk M., Ibrahim K., Niar S. (2007). Small Sample Clustering for MPSoC Simulation. Advanced Computer Architecture and Compilation for Embedded Systems ACACES, Aquila, Italy, juillet .

Tawk M., Ibrahim K., Niar S. (2006). Simulation acceleration for MPSOC performance and power consumption evaluation. Architectures and Compilers for Embedded Systems ACES, Anvers, Belgium, octobre .

Khan J., Elhillali Y., Niar S., Rivenq-Menhaj A. (2006). An Efficient Digital Correlator Architecture for an Anti-Collision Radar System. ACES 2006, Edegem Belgium, octobre .

Inglart N., Niar S. (2005). Compiler optimization-space exploration in the FACSE project. Architectures And Compilers for Embedded Systems ACES symposium, Edegem , Belgium, septembre .

Niar S., Inglart N. (2005). FACSE: a Framework for Architecture and Compiler Space Exploration. Intel Corporation EMEA (Europe, Middle East, Africa) Academic Forum, Gdansk, Poland, mai .

Sbeyti H., Niar S., Eeckhout L. (2004). Pattern-Driven Prefetching for Multimedia Applications on Embedded Processors. Program acceleration by Application-driven and architecture-driven Code Transformations Research network PACT” network symposium, Edegem, Belgium, septembre .

Inglart N., Eeckhout L., Niar S., De bosschere K. (2004). Statistical simulation based method for embedded system evaluation. Program acceleration by Application-driven and architecture-driven Code Transformations Research network PACT” network symposium, Edegem, Belgium, septembre .

Ammous K., Benameur N., Niar S., Abed M. (2003). Java bytecode compression for embedded systems. symposium PA3CT, Gend, Belgium, septembre .

Sbeyti H., Niar S., Eeckhout L. (2003). Hardware Prefetching Techniques for Embedded Multimedia Applications. “Program acceleration by Application-driven and architecture-driven Code Transformations Research network PACT” network symposium, Edegem , Belgium, septembre .

Niar S., Sbeyti H. (2002). Complexity analysis of the memory bandwidth requirements for the MPEG-4 video encoding system. Séminaire Réseau PACT, Gand, Belgique, octobre .

Niar S. (2000). Spec CPU2000 characterization for Superscalar Architectures. Séminaire du groupe architecture des ordinateurs UPC, Barcelona, Espagne, septembre .

Mémoire d'HDR

Niar S. (2005). Contribution à la conception de nouvelles micro-architectures : De retour vers les multiprocesseurs via l'embarqué. , ISTV, Valenciennes, novembre .

Brevet

Tatkeu C., Pham T., Rivenq-Menhaj A., Niar S., Elhillali Y. (2011). Obstacle Detection Device Including a System of Sound Restitution for Road Accident Avoidance. , juillet .